semiconductor MSC2313258D-xxbs2/ds2 1,048,576-word x 32-bit dynamic ram module : fast page mode type with edo this version: feb. 23. 199 9 description the MSC2313258D-xxbs2/ds2 is a fully decoded, 1,048,576-word x 32-bit cmos dynamic random access memory module composed of two 16mb drams in soj packages mounted with four decoupling capacitors on a 72-pin glass epoxy single-inline package. this module supports any application where high density and large capacity of storage memory are required. features 1,048,576-word x 32-bit organization 72-pin socket insertable module MSC2313258D-xxbs2 : gold tab MSC2313258D-xxds2 : solder tab single +5v supply 10% tolerance input : ttl compatible output : ttl compatible, 3-state refresh : 1024cycles/16ms /cas before /ras refresh, hidden refresh, /ras only refresh capab ility fast page mode capab ility product family access time (max.) power dissipation family t rac t aa t cac cycle time (min.) operating(max.) standby(max.) MSC2313258D-60bs2/ds2 60ns 30ns 15ns 104ns 1375mw MSC2313258D-70bs2/ds2 70ns 35ns 20ns 124ns 1265mw 11m w www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D module outline 1 72 r1.57 6.35 1.04typ. 1.270.1 95.25 2.03typ. 6.35typ. typ. 6.35 typ. 10.16 ( 3.18 19.00.2 101.19typ. 107.950.2 *1 3.38typ. 6.0min. 5.28max. +0.1 -0.08 1.27 (unit : mm) MSC2313258D-xxbs2/ds2 *1 the common size difference of the board width 12.5mm of its height is specified as 0.2. the value above 12.5mm is specified as 0.5. www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D pin configuration pin no. pin name pin no. pin name pin no. pin name pin no. pin name 1v ss 19 nc 37 nc 55 dq11 2 dq0 20 dq4 38 nc 56 dq27 3 dq16 21 dq20 39 v ss 57 dq12 4 dq1 22 dq5 40 /cas0 58 dq28 5 dq17 23 dq21 41 /cas2 59 v cc 6 dq2 24 dq6 42 /cas3 60 dq29 7 dq18 25 dq22 43 /cas1 61 dq13 8 dq3 26 dq7 44 /ras0 62 dq30 9 dq19 27 dq23 45 nc 63 dq14 10 v cc 28 a7 46 nc 64 dq31 11 nc 29 nc 47 /we 65 dq15 12 a0 30 v cc 48 nc 66 nc 13 a1 31 a8 49 dq8 67 pd1 14 a2 32 a9 50 dq24 68 pd2 15 a3 33 nc 51 dq9 69 pd3 16 a4 34 /ras2 52 dq25 70 pd4 17 a5 35 nc 53 dq10 71 nc 18 a6 36 nc 54 dq26 72 v ss presence detect pins pin no. pin name MSC2313258D -60bs2/ds2 MSC2313258D -70bs2/ds2 67 pd1 v ss v ss 68 pd2 v ss v ss 69 pd3 nc v ss 70 pd4 nc nc www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D block diagram /we /cas1 /cas0 a0-a9 /cas3 /cas2 dq0 a0-a9 dq1 dq3 dq2 dq4 dq5 /ras /lcas /ucas dq6 dq1 dq2 dq3 v cc v ss c1-c4 dq8 v ss /we /oe v cc dq4 dq5 dq6 dq7 dq7 dq8 dq9 dq11 dq10 dq12 dq13 dq14 dq9 dq10 dq11 dq16 dq12 dq13 dq14 dq15 dq15 /ras0 /ras2 dq16 a0-a9 dq1 dq3 dq2 dq4 dq5 /ras /lcas /ucas dq6 dq17 dq18 dq19 dq8 v ss /we /oe v cc dq20 dq21 dq22 dq23 dq7 dq24 dq9 dq11 dq10 dq12 dq13 dq14 dq25 dq26 dq27 dq16 dq28 dq29 dq30 dq31 dq15 www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D electrical characteristics absolute maximum ratings ( ta = 25c ) parameter symbol rating unit voltage on any pin relative to v ss v in , v out -1.0 to +7.0 v voltage on v cc supply relative to v ss v cc -1.0 to +7.0 v short circuit output current i os 50 ma power dissipation p d 2w operating temperature t opr 0 to +70 c storage temperature t stg -40 to +125 c recommended operat ing conditions ( ta = 0c to +70c ) parameter symbol min. typ. max. unit v cc 4.5 5.0 5.5 v power supply voltage v ss 000v input high voltage v ih 2.4 - 6.5 v input low voltage v il -1.0 - 0.8 v capacitance ( v cc = 5v 10%, ta = 25c, f = 1 mhz ) parameter symbol typ. max. unit input capacitance (a0 - a9) c in1 -21pf input capacitance (/we) c in2 -20pf input capacitance (/ras0, /ras2) c in3 -13pf input capacitance (/cas0- /cas3) c in4 -13pf i/o capacitance (dq0 - dq31) c dq -18pf note: capacitance measured with boonton meter. www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D dc characteristics (v cc = 5v 10%, ta = 0c to +70c ) MSC2313258D -60bs2/ds2 MSC2313258D -70bs2/ds2 parameter symbo l condition min. max. min. max. unit note input leakage current i li 0v v in 6.5v: all other pins not under test = 0v -20 20 -20 20 a output leakage current i lo data out is disable 0v v out 5.5v -10 10 -10 10 a output high voltage v oh i oh = -5.0ma 2.4 v cc 2.4 v cc v output low voltage v ol i ol = 4.2ma 0 0.4 0 0.4 v average power supply current (operating) i cc1 /ras cycling, /cas cycling, t rc = min. - 250 - 230 ma 1, 2 ttl-4-4ma1 power supply current (standby) i cc2 /ras = v ih /cas = v ih mos - 2 - 2 ma 1 average power supply current (/ras only refresh) i cc3 /ras cycling, /cas = v ih , t rc = min. - 250 - 230 ma 1, 2 average power supply current (/cas before /ras refresh) i cc6 t rc = min. - 250 - 230 ma 1, 2 average power supply current (fast page mode) i cc7 /ras = v il , /cas cycling, t pc = min. - 250 - 230 ma 1, 3 notes: 1. i cc is dependent on output loading and cycles rates. specified values are obtained with the output open. 2. address can be changed once or less while /ras = v il . 3. address can be changed once or less while /cas = v ih . www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D ac characteristics (1/2) (v cc = 5v 10%, ta = 0c to +70c ) note: 1, 2, 3 MSC2313258D -60bs2/ds2 MSC2313258D -70bs2/ds2 parameter symbol min. max. min. max. unit note random read or write cycle time t rc 104 - 124 - ns fast page mode cycle time t hpc 25 - 30 - ns access time from /ras t rac - 60 - 70 ns 4, 5, 6 access time from /cas t cac - 15 - 20 ns 4, 5 access time from column address t aa - 30 - 35 ns 4, 6 access time from /cas precharge t cpa - 35 - 40 ns 4 output low impedance time from /cas t clz 0-0-ns4 data output hold after /cas low t doh 5-5-ns /cas to data output buffer turn-off delay time t cez 0 15 0 20 ns 7, 8 /ras to data output buffer turn-off delay time t rez 0 15 0 20 ns 7, 8 /we to data output buffer turn-off delay time t wez 0 15 0 20 ns 7 transition time t t 1 50 1 50 ns 3 refresh period t ref -16-16ms /ras precharge time t rp 40 - 50 - ns /ras pulse width t ras 60 10k 70 10k ns /ras pulse width (fast page mode with edo) t rasp 60 100k 70 100k ns /ras hold time t rsh 10 - 13 - ns /cas precharge time (fast page mode with edo) t cp 10 - 10 - ns /cas pulse width t cas 10 10k 13 10k ns /cas hold time t csh 40 - 45 - ns /cas to /ras precharge time t crp 5-5-ns /ras hold time from /cas precharge t rhcp 35 - 40 - ns /ras to /cas delay time t rcd 14 45 14 50 ns 5 /ras to column address delay time t rad 12 30 12 35 ns 6 row address set-up time t asr 0-0-ns row address hold time t rah 10 - 10 - ns column address set-up time t asc 0-0-ns column address hold time t cah 10 - 13 - ns column address to /ras lead time t ral 30 - 35 - ns read command set-up time t rcs 0-0-ns read command hold time t rch 0-0-ns9 read command hold time referenced to /ras t rrh 0-0-ns9 www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D ac characteristics (2/2) (v cc = 5v 10%, ta = 0c to +70c ) note: 1, 2, 3 MSC2313258D -60bs2/ds2 MSC2313258D -70bs2/ds2 parameter symbol min. max. min. max. unit note write command set-up time t wcs 0-0-ns write command hold time t wch 10 - 13 - ns write command pulse width t wp 10 - 10 - ns /we pulse width (dq disable) t wpe 10 - 10 - ns write command to /ras lead time t rwl 10 - 13 - ns write command to /cas lead time t cwl 10 - 13 - ns data-in set-up time t ds 0-0-ns data-in hold time t dh 10 - 13 - ns /cas active delay time from /ras precharge t rpc 5-5-ns /ras to /cas set-up time (/cas before /ras) t csr 5-5-ns /ras to /cas hold time (/cas before /ras) t chr 10 - 10 - ns www.datasheet.co.kr datasheet pdf - http://www..net/
semiconductor MSC2313258D notes: 1. a start-up delay of 200s is required after power-up, followed by a minimum of eight initialization cycles (/ras only refresh or /cas before /ras refresh) before proper device operation is achieved. 2. the ac characteristics assumes t t = 2ns. 3. v ih (min.) and v il (max.) are reference levels for measuring input timing signals. transition time (t t ) are measured between v ih and v il . 4. this parameter is measured with a load circuit equivalent to 2ttl loads and 100pf. 5. operation within the t rcd (max.) limit ensures that t rac (max.) can be met. t rcd (max.) is specified as a reference point only. if t rcd is greater than the specified t rcd (max.) limit, then the access time is controlled by t cac . 6. operation within the t rad (max.) limit ensures that t rac (max.) can be met. t rad (max.) is specified as a reference point only. if t rad is greater than the specified t rad (max.) limit, then the access time is controlled by t aa . 7. t cez (max.), t rez (max.) and t wez (max.) define the time at which the output achieves the open circuit condition and are not referenced to output voltage levels. 8. t cez and t rez must be satisfied for open circuit condition. 9. t rch or t rrh must be satisfied for a read cycle. www.datasheet.co.kr datasheet pdf - http://www..net/
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